Stacked Transistors based Differential Amplifier for Signal Acquisition Applications

Анотація

This study presents a two-stage differential amplifier circuit that has been improved for use in a realistic biomedical signal conditioning system. CMOS technology serves as the foundation for the circuit. A MOS-based low-pass filter using stacked transistors is used in the creation of a differential amplifier that has low power, low noise, and high CMRR for portable electrocardiogram (ECG) signal conditioning. All of these characteristics are achieved by the utilization of stacked transistors. The usage of stack transistors with MOS that are connected at the output terminal is used to improve the design for electrocardiogram (ECG) signal conditioning as well as other types of signal conditioning for biomedical devices. Standard 45nm CMOS process technology was used in the construction of the amplifier that is being discussed. The amplifier runs at a supply voltage of 0.85 V. The findings of the simulation are produced by using the Cadence Analogue Virtuoso Spectre Simulator to generate the simulation. The differential amplifier that has been described demonstrates a common-mode rejection ratio (CMRR) of 178 dB at a frequency of 100 hertz, a power supply rejection ratio (PSRR) of 68 decibels, and a power dissipation of 1.5 microwatts. These characteristics conform with the results of the simulation. While the slew rate is 11 volts per second, the input-referred noise is 3.83 μV/√f. This is in contrast to the previous statement. In contrast to the conventional differential amplifier, the performance characteristics that were generated by using this approach are better and more efficient than those created by the standard circuit. The noise performance of the differential amplifier that was developed in the past is improved by the design that was recommended, which results in an improvement in noise performance.